As illustrated in FIG. 4, an electrically erasable programmable read-only memory (EEPROM) selects memory devices of addresses input from address terminals A1 to An, writes data which is input from data terminals D0 to Dm at a time of writing into the selected memory devices, and outputs data stored in the selected memory devices to the data terminals D0 to Dm at a time of reading.
In this case, a voltage higher than a power supply voltage is required for injecting or discharging charges into or from a floating gate at the time of writing. Accordingly, there is required a circuit configuration in which a plurality of voltages are switched thereamong and to be supplied to a word line (for example, see Patent Document 1).
Patent Document 1: Japanese Patent Application No. Hei 10-64209